CMOS Integrated Switching Power Converters: A Structured by Gerard Villar Piqué

By Gerard Villar Piqué

This booklet describes the dependent layout and optimization of effective, power processing built-in circuits. The procedure is multidisciplinary, overlaying the monolithic integration of IC layout recommendations, energy electronics and keep an eye on concept. particularly, this publication allows readers to conceive, synthesize, layout and enforce built-in circuits with high-density high-efficiency on-chip switching strength regulators. subject matters lined surround the based layout of the on-chip energy offer, potency optimization, IC-compatible energy inductors and capacitors, energy MOSFET switches and effective swap drivers in ordinary CMOS applied sciences.

  • Provides a entire reference on based layout and optimization of totally monolithic strength provides for on-chip energy administration;
  • Describes a multidisciplinary process, encompassing more suitable built-in strength units, either energetic and reactive, in addition to complex circuit topologies and switching regulate tools, including their implementation;
  • Enables concurrent layout of compact adaptive strength provides, including system-level and circuit-level techniques.

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Additional resources for CMOS Integrated Switching Power Converters: A Structured Design Approach

Example text

Additionally, the considered nominal output current will be set to 100 mA (which is representative for applications such as power supply of portable devices: MP3 players, some parts of more complex Hand-Held devices, etc. . ). Hence, a conventional Buck converter is the first topology considered to develop the design, because of its ability of reducing input to output voltage and its simplicity (which can be a very important factor to take into account when attempting to develop a fully integrated prototype).

Additionally, this implies a proportional switching frequency modulation, which in turn, produces an output ripple increase as the output current is reduced. The main consequence of this new consideration is a stronger constraint of the design space, which forces to carry out a new design space exploration, from which the 3-level converter design to be finally implemented is obtained. Chapter 7 covers the microelectronic design and implementation of the circuits required to approach the converter switched operation as expected (mainly due to the employment of the synchronous rectification scheme in addition to the DCM operation).

Voltage excursions in the switching nodes of a DCM operated buck converter, and instantaneous transistor current value for each state change . . . . . . . . . . . . . . . . . . . . . . Voltage excursions in the switching nodes of a CCM operated buck converter, and instantaneous transistor current value for each state change . . . . . . . . . . . . . . . . . . . . . . 25 µm mixed-signal process) . . . . . . . . . . . . . . . . . . .

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